Performance assessment of the optical packet switch architecture with highly distributed control under data center traffic
Roger Pueyo Centelles, Stefano Di Lucente, Harm J. S. Dorren, Nicola Calabretta · 2012
This paper analyzes the performance of an optical packet switch architecture with highly distributed control, designed for interconnection of cluster switches in a simulated data center traffic environment. The system under development can be scaled up to a very large ports count, in the thousand order, enabling interconnection of a great number of servers. An important feature of this optical packet switch is the few nanoseconds reconfiguration time, regardless of the port count. This characteristic is essential to minimize the end-to-end latency. Flow control is employed to regulate packets transmission between the electronic buffers of the ingress and egress ports. The limited contention resolution capability of the optical packet switch is compensated by these electronic buffers and a retransmissions algorithm. We investigate the performance of the switch with 1024 in/out ports in terms of data loss, throughput and latency with a data center-like traffic model. The results show that increasing the electronic input buffer size allows lower packet loss at the expense of higher latency. A buffer size in the order of 20 times the average packet length proves to be adequate to obtain a packet loss lower than 10−5and latency below 1 µs when managing a sustained normalized input load of 0.3. This traffic intensity is more than triple the average utilization of current data centers aggregation switches. Packet loss lower than 10−4can be achieved for input load up to 0.4, keeping latency at 1.4 µs.