Evolutionary graph generation withterminal-colour constraint forheterogeneous circuit synthesis
Masanori Natsui, Takafumi Aoki, T. Higuchi · Electronics Letters · 2001
A novel graph-based evolutionary optimisation technique that can be used to synthesise heterogeneous circuits consisting of various different components is proposed. The key idea is to introduce ‘circuit graphs with coloured terminals’ for modelling heterogeneous architectures. The potential of the proposed approach is demonstrated through experimental synthesis of a radix-4 signed-digit (SD) full adder circuit.