System level interconnect design for network-on-chip using interconnect IPs

Jian Liu, Meigen Shen, Li‐Rong Zheng, Hannu Tenhunen · 2003

Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee.

Read the paper · More papers on PaperTik