Dynamic voltage and frequency scaling for power saving in TD-SCDMA
Fangwei Li, Li-Han · 2010
Powering saving is one of the key technologies in mobile terminal design. A fast estimation dynamic voltage and frequency scaling (DVFS) mechanism is developed to greatly reduce the dynamic power. The fast estimation algorithm can adaptively predict the optimum suppply voltagr and the optimum clock frequency. It sets the processor's operating frequency and voltage based on predicting the short-term software workload on the processor. It effectively extends the working time of TD-SCDMA terminal. This has both significant technical and practical bearing on the development of the TD-SCDMA industry.