Behavioral to structural translation in a bit-serial silicon compiler
Richard I. Hartley, J.R. Jasica · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems · 1988
After a brief discussion of previous work in the field of behavioral-to-structural translation, the bit-serial architecture which is the target of the bit-serial compiler is discussed. The bit-serial language (BSL) is then defined, and the details of the behavioral-to-structural translation are given.>