A One Gigaflop VLSI Systolic Processor
John H. Avila, Philip J. Kuekes · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1983
Inexpensive, efficient VLSI circuits combined with a highly parallel systolic architecture will allow the construction of one gigaflop linear algebra processors for signal processing. This paper presents some results in increasing the efficiency of such processors to 100%.