VLSI architecture for IEEE 802.5 token-ring LAN controller
Kenichiro Tanaka, K. Fujimoto, E. Katsumata, T. Yaguchi, Kiichiro Tamaru, Akira Kanuma, Seiji Iida, Akihito Nishikawa, Hajime Shiraishi, T. Mineoka, Tetsuya Shimamura · 1989
A description is given of the architecture of the token-ring LAN controller (TRC) compatible with IEEE 802.5 media access control (MAC) protocol, which integrates a frame transmit/receive hardware, a high-speed protocol processor, a three-channel DMA controller (DMAC) and large-capacity dual-port RAMs. The performance analysis of the frame transmit/receive shows that the TRC is suitable not only for small computers, but also for high-performance applications