A sample-and-hold semi-systolic analogue realization for 2-D recursive digital filters
M.A. Sid-Ahmed · International Journal of Electronics · 1992
A sample-and-hold semi-systolic analogue realization for 2-D IIR niters utilizing only analogue components (analogue multipliers, CCDs, ⃛, etc.) is presented. This form of realization would be capable of handling the high data rate required by such applications as high definition television (HDTV) (˜ 1050 × 1400 pixels per frame). Such applications would require a throughput rate in excess of 40 million pixels per second. Available forms of digital realizations for 2-D IIR filters are incapable of achieving such a high rate with commercially available ICs and/or realistic cost.