Squarers in QCA nanotechnology
Olympia Giannou, Haridimos T. Vergos, Dimitris Bakalis · 2012
A novel architecture suitable for designing squaring circuits in Quantum-dot Cellular Automata (QCA) nanotechnology is explored in this manuscript. It consists of a reduced partial product array followed by a Dadda adder tree and a final carry-flow adder. A new full adder (FA) layout is also introduced that is more area efficient than the already proposed ones. The proposed squarers offer an execution delay of (2n - 1) clock zones. Layouts of the proposed squarers using multilayer design in the QCAdesigner toolset are presented and their area and delay complexities are compared against previously proposed multipliers.