Automatic test generation for large digital circuits
Akihiko Yamada, N. Wakatsuki, 柴野秀男, Osamu Ito, Kyouji Tomita, Shigehiro Funatsu · Design Automation Conference · 1977
This paper describes an implemented technique of automatic test generation for large digital circuits. The test generator presented in this paper basically uses the path sensitizing method and is applicable to all kinds of logical circuits. Some application results are also described.