Interleaved-bitslice AES encryption and decryption with massive-parallel mobile embedded processor
Takeshi Kumaki, Takeshi Fujino, Tetsushi Koide · 2014
This paper presents an interleaved-bitslice AES encryption and decryption with massive-parallel mobile embedded processor. Recent mobile devices need to apply private-information secure technology, such as cipher processing, to prevent the leakage of personal information. However, this adds to the product's required-specifications, especially cipher implementation for fast processing, low power consumption, low hardware cost and adaptability. To satisfy these security-related needs, the interleaved-bitslice method for a massive-parallel SIMD matrix is proposed for parallel block cipher processing with five confidentiality modes on mobile machineries. For the AES algorithm, this processor implementation has up to 93% fewer clock cycles per byte than the conventional mobile processor. Additionally, the MX-1 results are almost constant for all confidentiality modes. Consequently, the interleaved-bitslice block cipher processing with five confidentiality modes on the MX-1 is very effective for implementation of parallel block cipher processing for several mobile devices.