Synthesis of heterogeneous pipelined multiprocessor systems using ILP
Haris Javaid, Sri Parameswaran · 2008
Streaming applications can be implemented with a pipeline of processors. Each processor in the pipeline can be an application Specific Instruction Set Processor (ASIP) with the result being a heterogeneous pipelined MPSoC system. Since ASIPs can be of differing configurations, finding the optimal set of configurations for a multiprocessor architecture is a difficult problem.