A Power, Performance Scalable Eight-Cores Media Processor for Mobile Multimedia Applications
Tatsuya Mori, Yasuyuki Ueda, Nobuhiro Nonogaki, Toshihiro Terazawa, Milosz Sroka, Tetsuya Fujita, Takeshi Kodaka, Takayuki Mori, Kumiko Morita, Hideho Arakida, Takashi Miura, Yuji Okuda, Toshiki Kizu, Yoshiro Tsuboi · IEEE Journal of Solid-State Circuits · 2009
We have developed an eight-core media processor for mobile multimedia applications, which achieves low power consumption and high performance. The processor uses a specific parallel process execution scheme that achieves high performance and allows parallel processing with performance and power consumption scalability over available resources. In addition, the parallel process execution scheme enables software reusability and binary compatibility, which notably reduces development costs. The evaluated application for this multi-core processor design was an A/V playback with H.264 video decoder and an AAC audio decoder. The evaluation includes performance and power consumption for software without recompilation. The results demonstrate that by efficiently using the software scheme it is possible to achieve important gains in hardware potential.