Boosting the performance of hybrid snooping cache protocols
Fredrik Dahlgren · 1995
Previous studies of bus-based shared-memo ~ multiprocessors have shown hybrid write-invalidate/write-update snooping proto-cols to be incapable of providing consistent performance improve-ments over write-invalidate protocols. In this pape ~ we analyze the deficiencies of hybrid snooping protocols under release consis-tency, and show how these deficiencies can be dramatically reduced by using write caches and read snar-ng. Our pe~ormance evaluation is based on program-driven simu-lation and a set ofjive scienti~c applications with different sharing behaviors including migratory sharing as well as producer-con-sumer sharing. We show that a hybrid protocol, extended with write caches as well as read snar-ng, manages to reduce the num-ber of coherence misses by between 83 % and 95 % as compared to a write-invalidate protocol for all$ve applications in this study. In addition, the number of bus transactions is reduced by between 36 % and 60 % for four of the applications and by 9 % for the jifth application. Because of the small implementation cost of the hybrid protocol and the two extensions, we believe that this combi-nation is an effective approach to boost the performance of bus-based multiprocessors, 1.