FPGA design of a real-time edge enhancing smoothing filter
Nimit Pandya, Chang Y. Choo · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2013
Traditional noise removal filters have an undesirable side effect of blurring edges, which is unacceptable for some image processing applications. To overcome this problem, our ongoing project evaluates an edge enhancing smoothening filter and implements it on FPGAs to reduce noise while sharpening edges. One such edge enhancing smoothing filter consists of a combination of the bilateral filter (used for edge preserving smoothing) and the Shock filter (used for edge enhancement) to achieve the desired result. This paper describes an implementation of the bilateral filter on Altera FPGAs. Shock filter part is then briefly described. Area and speed performance results for different Altera FPGA families are comparatively shown.