Application of fault modeling to continuous built‐in test (c‐BIT) for microwave and MMIC circuits
David L. Rhodes, Michael T. Cummings, George F. Tempel · International Journal of Microwave and Millimeter-Wave Computer-Aided Engineering · 1994
Abstract A simulation‐before‐test method has been applied to the linear and nonlinear microwave built‐in test (BIT) problem. Fault simulation via a harmonic balance simulator is used to analyze and optimize BIT hardware placement based on figures of merit such as fault coverage, ambiguity size, and part isolation. Fault models for a prototype microwave mini‐system were developed along with models for the BIT hardware itself. The search method developed to automate the placement of BIT hardware is an essential design‐for‐test tool. The techniques developed were applied to an example system and results are given.