Surreptitious Use Prevention Mechanisms for the System LSI Core
Tsugio Nakamura, Tomotake Sato, Narito Fuyutsume, Hiroshi Kasahara, Teruo Tanaka · IEEJ Transactions on Electronics Information and Systems · 2004
Protection countermeasures for the intellectual property (IP) of adopted cores are an important issue in ultra large-scale integrated circuits called system LSI. In this paper, we propose embedding cryptosystems such as a public key system or hash function system with cores to be protected. Which system should be adopted is considered from the viewpoints of importance of the core, efficiency and authentication structure. The soundness of each method is confirmed by trial productions by gate array process, implementation by FPGA, and by computer simulation.