Fast hardware implementation of the Winograd Fourier transform algorithm
M.D. Macleod, N.L. Bragg · Electronics Letters · 1983
We describe a novel partitioning of small Winograd DFTs into two identical subunits, each of which computes a real-input DFT. A bit-serial arithmetic single IC implementation in semicustom or custom LSI is described. A fast hardware WFTA is then proposed which is efficient for complex or real input data.