CSP extended: imperative state and true concurrency
Adrian E. Lawrence · IEE Proceedings - Software · 2003
is an extension of CSP and ℋ is in turn an extension of which captures the semantics of hardware compilation. Because it is a superset of , it can describe both hardware and software and so is useful for co-design. The extensions beyond include: true concurrency; new hardware constructors; and a simple and natural way to represent an imperative state. Both and ℋ were invented to cope with problems that arose while the author was trying to prove that the hardware that he had designed correctly implemented channels between a processor and an FPGA. Standard CSP did not capture priority, yet the circuits in the FPGA and the occam processes in the processor both depended on priority for their correctness. The current state of ℋ is reported and attention is focused on handling the imperative state and true concurrency. The acceptance denotational semantics is described briefly.