Centip3De: A 64-Core, 3D Stacked Near-Threshold System
Ronald Dreslinski, David Fick, Bharan Giridhar, Gyouho Kim, Sangwon Seo, Matthew R. Fojtik, Sudhir K. Satpathy, Yoonmyung Lee, Daeyeon Kim, Nurrachman Liu, Michael Wieckowski, Gregory Chen, Dennis Sylvester, David T. Blaauw, Trevor Mudge · IEEE Micro · 2013
Centip3De uses the synergy between 3D integration and near-threshold computing to create a reconfigurable system that provides both energy-efficient operation and techniques to address single-thread performance bottlenecks. The original Centip3De design is a seven-layer 3D stacked design with 128 cores and 256 Mbytes of DRAM. Silicon results show a two-layer, 64-core system in 130-nm technology, which achieved an energy efficiency of 3,930 DMIPS/W.