Engineering software-more logic synthesis for ASICs
M.J.S. Smith · IEEE Spectrum · 1992
Computer-aided design (CAD) tools that reduce application-specific integrated circuit (ASIC) development time are examined. The use of hardware description languages to ease the data entry tasks of ASIC designers is discussed. Coupling logic synthesis tools to layout tools is considered. Limitations of logic synthesis are addressed, and some features of intelligent synthesis tools are described.>