VectorSTM: Software Transactional Memory without Atomic Instructions
Peng Lin, Lunguo Xie, Xiaoqiang Zhang, Xin-yan Xie · 2010
Transactional Memory(TM) is a promising way to coordinate concurrent threads in multi-core processors. Software transactional memory (STM) can run on conventional processors without additional hardware support. In this paper we propose VectorSTM which reduces the cost of centralized concurrency control. VectorSTM employs distributed vector timestamps instead of a single global timestamp to track the progress of transactions. Conflict detecting and transaction committing are done by polling thread local bloom filter queues which are indexed by the vector timestamps. Without employing any atomic instructions, VectorSTM reduces synchronization cost on the global timestamp variable and provides more concurrency. VectorSTM provides privatization safety which is critical to software transactional memory safety and avoids live lock and starvation by effective contention manager. We evaluate VectorSTM with STAMP benchmarks and the results show that the design offer superior performance or stronger semantics than TL2 and RingSTM algorithm. On particular tests VectorSTM outperforms TL2 and RingSTM 27% and 41% respectively with 8 threads running.