A new switched‐capacitor transformer and its analysis
Takahiro Inoue, Fumio B. Ueno, Ichirou Oota · Electronics and Communications in Japan (Part I Communications) · 1981
Abstract IC realization of a switched‐capacitor transformer with in integer turn ratios, based on alternating and switching series and parallel‐connections of capacitors is presented. The circuit consists of n capacitors and 3n+1 MOS FET switches. This circuit is advantageous in that it has monolithic IC capability, DC voltage step‐up and step‐down are possible and non‐grounding can be achieved. It is thus useful for the integration of difficult circuits containing transformers. In this paper theoretical analyses are given for the case of ideal capacitors and switches, and for the case of non‐zero stray capacitance and on‐resistance. The effects of the on‐resistance of switches on the transfer characteristics of the transformer on the operating frequency range, allowable input level, element sensitivity and temperature characteristics are shown both theoretically and experimentally. As an example of applications, the test of a first‐order all‐pass filter is presented. The test used two 1,000pF capacitors and MOS FET switches; voltage step‐up and step‐down in the range from DC to 100 kHz were demonstrated. In this case the maximum allowable input level is about 0.5V and stability is ensured at temperatures from −20 to 80°C.