Oscillation and Transition Tests for Synchronous Sequential Circuits
Katherine Shu-Min Li · IEEE Transactions on Very Large Scale Integration (VLSI) Systems · 2013
In this brief, we propose an oscillation-ring test methodology for synchronous sequential circuits under the scan test environment. This approach provides the following features: 1) it is at-speed testing, which makes delay defects detectable; 2) the automatic test pattern generation is much easier, and the test set is usually smaller; and 3) test responses are directly observable at primary outputs and, thus, it greatly reduces the communication bandwidth between the automatic test equipment and the circuit under test. A modified scan register design supporting the oscillation-ring test is presented and an effective oscillation test generation algorithm for the proposed test scheme is given. Experimental results on LGSyn91 benchmarks show that the proposed test method achieves high fault coverage with a smaller number of test vectors.