Parametrized Verification Diagrams
Alejandro Sánchez, César Sánchez · 2014
This paper introduces parametrized verification diagrams (PVDs), a formalism that allows to prove temporal properties of parametrized concurrent systems, in which a given program is executed by an unbounded number of processes. PVDs extend general verification diagrams (GVDs). GVDs encode succinctly a proof that a non-parametrized reactive system satisfies a given temporal property. Even though GVDs are known to be sound and complete for non-parametrized systems, proving temporal properties of parametrized systems potentially requires to find a different diagram for each instantiation of the parameter (number of processes). In turn, each diagram requires to discharge and prove a different collection of verification conditions. PVDs allow a single diagram to represent the proof that all instances of the parametrized system for an arbitrary number of threads running concurrently satisfy the temporal specification. Checking the proof represented by a PVD requires proving only a finite collection of quantifier-free verification conditions. The PVDs we present here exploit the symmetry assumption, under which process identifiers are interchangeable. This assumption covers a large class of concurrent systems, including concurrent datatypes. We illustrate the use of PVDs in the verification of an infinite state mutual exclusion protocol.