A dynamic quality-scalable H.264 video encoder chip
Hsiu-Cheng Chang, Yao-Chang Yang, Jiawei Chen, Ching-Lung Su, Cheng-An Chien, Jiun-In Guo, Jinn‐Shyan Wang · Asia and South Pacific Design Automation Conference · 2009
This paper proposes a dynamic quality-scalable H.264 video encoder that comprises 470Kgates and 13.3Kbytes SRAM using 1P8M 0.13μm CMOS technology. Exploiting parameterized algorithms for motion estimation and intra prediction, the proposed design can dynamically configure the encoding modes with the design trade-off between power consumption and video quality for various video encoding applications. It achieves real-time H.264 video encoding on CIF, D1, and HD720@30fps with 7mW-25mW, 27mW-162mW, and 122mW-183mW power dissipation in different quality modes.