Limited exception modeling and its use in presynthesis optimizations
Jian Li, Rajesh K. Gupta · 1997
# In behavioral descriptions# statements that allow limited control jumps# suchasVerilog disable statements on named blocks# are often used for describ# ing system behavior in presence of exceptions. In this pa# per# we extend Timed Decision Tables #TDT## a tabular behavior model# to represent more general control struc# tures including exceptions. Weintroduce the notion of action sharing that allows us to reduce resource require# ments using existing high#level synthesis tools on descrip# tions with control exceptions. We present presynthesis algorithms that work on the extended TDT model and an algorithm that performs action sharing in TDT models. Our experiments on well#known HardwareC benchmarks show size reduction resulting from sharing actions in the input behavioral descriptions. 1 Introduction Behavioral descriptions in HDLs use control##ow con# structs such as conditional branches and loops. In ad# dition to the normal control #ow constructs suchas if statementorwhile loop#...