Accelerating synchronization communications for high-density blade enclosure
Zheng Cao, Fei Chen, Xuejun An, Qiang Li · 2014
The high-density blade server provides an attractive solution for the rapidly increasing demand on computing. The degree of parallelism inside a blade enclosure today has reached up to hundreds of cores. In such parallelism, it is necessary to accelerate synchronization operations. In order to accelerate intra-enclosure synchronization operations, this paper proposes a single chip design SyncRouter on the midplane of the blade enclosure. The architecture of SyncRouter is somewhat like a microprocessor whose memory system is of tag-value structure. We call such a memory system Shared Synchronization Memory (SSM). In this paper, both the architecture and usage of the proposed SyncRouter are introduced in detail. We also build a blade enclosure with the SyncRouter implemented in Xilinx XC6LX365T FPGA. Evaluations using both micro-benchmarks and benchmarks are performed on the blade enclosure. The latency of one pair of ssm_put and ssm_get and the minimum latency of ssm_barrier are 0.62 μ s, and the minimum latency of ssm_reduce is 0.81 μ s. Regarding the benchmarks 2D Wave-front and LU, the speedup of using the fine-grained synchronization primitive ssm_put/ssm_get outperforms the one of using the ssm_barrier by 20% on average.