A zero VTH memory cell ferroelectric-NAND flash memory with 32% read disturb, 24% program disturb, 10% data retention improvement for enterprise SSD
Teruyoshi Hatanaka, Minoru Takahashi, Shigeki Sakai, Ken Takeuchi · 2009
A zero VTHmemory cell scheme for the ferroelectric (Fe)-NAND flash memory is proposed. In the zero VTHmemory cell scheme, the middle of VTHof erased and programmed cells is 0 V. Based on the measurement, this paper shows for the first time that the reliability of a Fe-NAND cell such as the data retention, read disturb, and program disturb is best optimized in the proposed zero VTHcell. The measured VTHshift due to the read disturb, program disturb and data retention decreases by 32%, 24% and 10%, respectively. Contrarily, in the negative VTHcell where the middle of VTHof erased and programmed cells is negative, the VTHshift during the data retention is as much as 0.49 V and unacceptably large. In the conventional positive VTHcell where the middle of VTHof erased and programmed cells is positive suffers from a sever read and program disturb. The measured results are drastically different from those of the conventional floating-gate NAND cell where the negative VTHcell is most suitable in terms of the reliability.