1A Processor: Control System
A. H. Budlong, B. G. De Lugish, S. M. Neville, Jędrzej Nowak, J. L. Quinn, F. W. Wendland · Bell System Technical Journal · 1977
This article contains a description of the central control, input/output subsystem, processor-peripheral interface, master control console, and the interunit communication bus system. The units are discussed in a manner which highlights comparison of features with No. 1 ess and stresses those features which are most important in meeting the stringent reliability objectives.