Cluster's last RAM: will dual-port RAM speed up a hierarchical cache multiprocessor ?
M. Landgraf · 1990
Summary form only given. A hierarchical cache multiprocessor system is analyzed for improvement as standard main memory is replaced with dual-port RAM. Qualitative analysis indicates under what conditions dual-port RAM would be desired. A subsequent quantitative analysis, based on typical bus traffic conditions, outlines the extent of improvement attainable. Finally, a number of system variables affecting the analysis are considered for their effect on the use of dual-port RAM.>