A Memory based Encoder and Decoder for a (15,7)Double Error Correcting BCH Code
K P M Bhat, Hari Balakrishna · IETE Technical Review · 2001
A look-up table based encoder and decoder hardware for a (15,7) double error correcting BCH codes is designed and developed. Relevant algorithms for cyclic encoding and parallel decoding are presented. The attraction of this hardware is that it is simple, fast and elegant.