Low-power 200-Msps, area-efficient, five-tap programmable FIR filter [in BiCMOS]
David Moloney, J. O'Brien, Eugene O'Rourke, Francesco Brianti · IEEE Journal of Solid-State Circuits · 1998
A two-sample per cycle, programmable five-tap, area-efficient finite-impulse response (FIR) filter for hard-disk drive PRML read channels is presented. The design is optimized for low power, achieving a figure of 6.25 /spl mu/W/MHz with a gate density of 2.3 K, by a combination of algorithmic, architectural, circuit-level, and layout techniques.