S.T.T. design of asynchronous sequential counters using ‘unit’ machines

R. M. H. Cheng, K.O. Okpere · Electronics Letters · 1970

A systematic procedure for the parallel cascading of asynchronous counters (referred to as ‘unit’ machines) is proposed as a method of realising, in a single-transition-time (s.t.t.) manner, an asynchronous counter of any code.

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