C2MP: a cache-coherent, distributed memory multiprocessor-system
D. E. Marquardt, Hasan S. Alkhatib · 1989
Current research into the problems of cache coherency in multiprocessor (MP) systems, has primarily focused on bus based memory interconnection networks (M-ICN) and the use of various types of “snooping” cache coherency protocols. Bus bandwidth limitations can be alleviated through the use of wider bandwidth general interconnection structures, such as a crossbar switch. However, if private caches are used, the cache coherency problem becomes multiply compounded. Little work has been done to address this problem.