Real-time control systems design using a high speed rapid response systolic array
Eric Rogers, Yun Li · 1990
Systolic wavefront array architectures for real-time digital control system design are considered. Described is the development of word-level systolic and and wavefront architectures for recursive filtering and on-line feedback control schemes. Each of these arrays uses only one type of cell and has the same array configuration. These offer a word-level shortest processing delay (or system latency) of one cycle, while retaining a very high throughput rate, and hence are applicable to real-time feedback control engineering problems.>