An ac test structure for fast memory arrays
Robert Wong · IBM Journal of Research and Development · 1990
An ac test structure (ACTS) built into fast memory arrays is required to make them truly ac-testable, with 5–10% timing accuracy. Since their ac performance is very difficult to characterize, wafer tester timing uncertainty is generally about 10–50% of a typical array access time. More accurate testers are complex and expensive; they require long development time and have complicated operation procedures. ACTS is a simpler, cheaper, and more practical means of achieving greater accuracy. An ac test structure is composed of a tunable timer and path-shifting oscillators (PSOs) built around the various access paths of the array. The timer generates the array clocks with adjustable pulse widths, and the PSOs transform time intervals into frequencies. In the future, tester accuracy will improve, but memory performance will have accelerated even more. Thus, the need for ACTS is critical and will remain so in the foreseeable future.