Tera-scale Computing - Interconnect Challenges
Jerry R. Bautista · Conference proceedings · 2007
Future CPU directions are increasingly emphasizing parallel compute platforms which are critically dependent upon upon greater core to core communication and generally stress the overall memory and storage interconnect hierarchy to a much greater degree than extrapolations of past platform needs. Performance is critically dependent upon bandwidth/latency but must be moderated with power and cost considerations. Motivation, requirements, and potential solutions are summarized briefly in this paper.