Solving thermal problems of hot chips using Voronoi diagrams
Subhashis Majumder, Bhargab B. Bhattacharya · 2006
A geometric simulation based method is proposed in this paper, for fast identification of hot spots and zones on a chip. Given a set of points on the chip floor with their respective thermal strengths, a multiplicatively weighted Voronoi diagram is used to mark the zones of the chip that are under potential thermal threat. For further accurate prediction of hot spots and zones on the chip, simulation is performed only in these regions. This method provides a significant amount of savings in simulation time. Next a simple procedure is suggested to disperse some of the source points on the chip so that the thermal profile of the critical zones may go down below the threshold (safe) level.