Novel CMOS sampled-data VLSI implementation of artificial neural networks
Sameh Ebrahim Rehan, M.I. Elmasry · Electronics Letters · 1992
A mixed-mode VLSI implementation of artificial neural networks offers a tradeoff solution for speed, area saving, and flexibility. In the Letter, a novel CMOS sampled-data programmable synapse and a simple CMOS analogue neuron have been developed. Using a 1.2μm CMOS technology, the synapse consumed 120 × 120μm2 and the neuron consumed 120 × 260 μm2.