2.8 to 67.2mW Low-Power and Power-Aware H.264 Encoder for Mobile Applications
Tung-Chien Chen, Yuhan Chen, Chuan-Yung Tsai, Sung-Fang Tsai, Shao‐Yi Chien, Liang‐Gee Chen · 2007
A 2.8 to 67.2mW H.264 encoder is implemented on a 12.8mm2die with 0.18μm CMOS technology. The proposed parallel architectures along with fast algorithms and data reuse schemes enable 77.9% power savings. The power awareness is provided through a flexible system hierarchy that supports content-aware algorithms and module-wise gated clock.