Visual interfaces for high level hardware synthesis
Shamim Mohamed, Erric Solomon · 1998
We present a proposal to demonstrate some of the visual interfaces used in the suite of High-Level Hardware Synthesis tools developed by Synopsys Inc. Hardware Synthesis is the process of converting a high-level description of the hardware in a "hardware description language" (HDL) like Verilog or VHDL into a list of gates that can be fabricated in silicon.