Design of a self checking Reed Solomon encoder

G.C. Cardarilli, Salvatore Pontarelli, Marco Re, A. Salsano · 2005

In this paper, an innovative self-checking Reed Solomon encoder architecture is described. The presented architecture exploits some properties of the arithmetic operations in GF(2/sup 3/) related to the parity of the binary representation of the field elements. Moreover, a method for introducing self-checking capabilities on all the arithmetic structures used in the Reed Solomon encoder is presented. Finally the self-checking encoder architecture has been mapped on a FPGA evaluating its area overhead.

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