System-on-chip implementation of the whole advanced encryption standard processor using reduced XOR-based sum-of-product operations
Shen‐Fu Hsiao, M.-C. Chen, Ming-Te Tsai, Chi-Guang Lin · IEE proceedings. Information security · 2005
An efficient common subexpression elimination algorithm is presented to reduce the area cost of realising the XOR-based operations for MixColumns, InvMixColumns, SubBytes, and InvSubBytes transformations in the Rijndael Advanced Encryption Standard (AES). This algorithm contains four optimisation priorities to extract the common factors in the bit-level equations. Performance comparisons in both the architecture-level design and the technology-dependent cell-based implementations are given. Experimental results show the authors proposed method reduces significantly the area cost of the whole AES processor design compared with synopsys area-optimised synthesis results or other previous implementations.