FPGA implementation of non-separable symmetrically extended 2-D discrete biorthogonal wavelet transform
I.S. Uzun · 2004
Due to the importance of the 2D biorthogonal wavelet transform in image and video processing applications, this paper reports on the design and hardware implementation of an efficient architecture for the non-separable 2D discrete biorthogonal wavelet transform (DBWT). The architecture adopts periodic symmetric extension at the image boundaries, therefore it conforms to the JPEG-2000 standard. It computes the DBWT decomposition of an N×N image in approximately O(2N2/3) clock cycles (ccs). Hardware implementation results based on a Xilinx Virtex-2000E FPGA chip are also provided.