DDR SDRAM Memory Controller for Digital TV Decoders

Hadley Siqueira, Ivan Saraiva Silva, Márcio Kreutz, Edgard de Faria Corrêa · 2011

This paper presents a multichannel DDR SDRAM memory controller to be used as an IP in a set-top box compliant with Brazilian Digital Television System. A set-top box is comprised by modules that access an external memory sharing the same bus. Thus, it is necessary a multichannel memory controller to schedule accesses. This work shows that the implemented system running at 100 MHz can achieve the necessary bandwidth to decode and exhibit HD 1080p resolution videos at 30 frames per second.

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