A Robust Architectural Approach for Cryptographic Algorithms Using GALS Pipelines
Rafael Iankowski Soares, Ney Laert Vilar Calazans, Fernando Moraes, Philippe Maurine, Lionel Torres · IEEE Design & Test of Computers · 2011
Editors' note:This article presents the design of a cryptographic chip using a globally asynchronous, locally synchronous (GALS) design methodology. The design demonstrates the key advantage of using asynchrony in cryptography: the randomization of event timing internal to the chip leads to a dramatic increase in its robustness to side-channel attacks based on power and electromagnetic emission signatures.—Montek Singh (UNC Chapel Hill) and Luciano Lavagno (Politecnico di Torino)