Testing multiple-output CMOS combinational circuits
Asad A. Ismaeel · International Journal of Electronics · 1989
The logic transistor function testing method used for testing single-output CMOS combinational circuits is extended to cover multiple-output CMOS combinational circuits. An algorithm is developed to generate test vectors capable of detecting single and multiple transistor stuck-open/stuck-short faults. We consider single and multiple faults that have a combinational effect, i.e. only a single-input vector test is required. Techniques that enhance the analysis and the planning of testing strategies that best accommodate particular test requirements, such as output-pin limitations, are developed. Illustrations of a multiple-output CMOS combinational circuit are presented.