Efficient and Effective Redundancy Removal for Million-Gate Circuits
M.R.C.M. Berkelaar, K. van Eijk · Design, Automation, and Test in Europe · 2002
Summary form only given. In Magma's BlastFusion/spl reg/ and BlastChip/spl reg/ software, very large blocks of logic (millions of gates) are handled flat. We implemented redundancy removal in a way that will allow it to run efficiently (fast, low memory usage) and robustly (no run time or memory explosion on any netlist) on industrial designs of up to several million gates. We achieve this without resorting to partitioning. We do not try to identify all redundancies in a circuit, as an exact solution to this NP-hard problem is infeasible for the large circuits we face. Instead we try to identify as many as possible in a reasonable run time. We use a carefully engineered combination of Fault Collapsing, Random Test Generation (RTG) and the D-algorithm.