Real-time maximum value determination on an easily testable VLSI architecture

M. Vai, Matthieu Moy · IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications · 1993

An algorithm is presented for determining the maximum value of n numerical elements on a VLSI architecture. The computational complexity of this algorithm does not depend on the number of elements, so that it is suitable for real-time applications. The architecture is easily testable, and a simple scheme for the generation of its test vectors is provided.>

Read the paper · More papers on PaperTik